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More About This Title Embedded Systems - A Contemporary Design ToolSecond Edition
English
Embedded Systems: A Contemporary Design Tool, Second Edition
Embedded systems are one of the foundational elements of today’s evolving and growing computer technology. From operating our cars, managing our smart phones, cleaning our homes, or cooking our meals, the special computers we call embedded systems are quietly and unobtrusively making our lives easier, safer, and more connected. While working in increasingly challenging environments, embedded systems give us the ability to put increasing amounts of capability into ever-smaller and more powerful devices.
Embedded Systems: A Contemporary Design Tool, Second Edition introduces you to the theoretical hardware and software foundations of these systems and expands into the areas of signal integrity, system security, low power, and hardware-software co-design. The text builds upon earlier material to show you how to apply reliable, robust solutions to a wide range of applications operating in today’s often challenging environments.
Taking the user’s problem and needs as your starting point, you will explore each of the key theoretical and practical issues to consider when designing an application in today’s world. Author James Peckol walks you through the formal hardware and software development process covering:
- Breaking the problem down into major functional blocks;
- Planning the digital and software architecture of the system;
- Utilizing the hardware and software co-design process;
- Designing the physical world interface to external analog and digital signals;
- Addressing security issues as an integral part of the design process;
- Managing signal integrity problems and reducing power demands in contemporary systems;
- Debugging and testing throughout the design and development cycle;
- Improving performance.
Stressing the importance of security, safety, and reliability in the design and development of embedded systems and providing a balanced treatment of both the hardware and the software aspects, Embedded Systems: A Contemporary Design Tool, Second Edition gives you the tools for creating embedded designs that solve contemporary real-world challenges.
English
James K. Peckol, Ph.D. is a Principal Lecturer in the Department of Electrical Engineering at the University of Washington – Seattle where he has been named teacher of the year three times and outstanding faculty twice. He is also the founder of Oxford Consulting, Ltd., a product design and development consulting firm, a member of Who’sWho in the World, and has been presented with the Marquis Who’sWho Lifetime Achievement Award.
English
Preface. v
0. Foreword: Introduction to Embedded Systems. xxxv
0.0. Introducing Embedded Systems xxxv
0.1. Philosophy xxxv
0.2. Embedded Systems xxxvi
0.3. The Embedded Design and Development Process xl
0.4. Summary vl
0.5. Review Questions xlvi
0.6. Thought Questions xlvi
Part One Hardware and Software Infrastructure
1. The Hardware Side—Part 1: An Introduction. 1
1.0. Introduction 1
1.1. The Hardware Side—Getting Started 2
1.2. The Core Level 3
1.3. Representing Information 8
1.4. Understanding Numbers 9
1.5. Addresses 12
1.6. Instructions 13
1.7. Registers—A First Look 16
1.8. Embedded Systems—An Instruction Set View 16
1.9. Embedded Systems—A Register View 33
1.10. Register Transfer Language 35
1.11. Register View of a Microprocessor 36
1.12. Summary 41
1.13. Review Questions 41
1.14. Thought Questions 46
1.15. Problems 47
2. The Hardware Side—Part 2: Combinational Logic—A Practical View. 55
2.0. Introduction 55
2.1. A Look at Real-World Gates—Part 1: Signal Levels 56
2.2. A Look at Real-World Gates—Part 2: Time 64
2.3. A Look at Real-World Gates—Part 3: The Legacy of Early Physicists 69
2.4. Look for the Guilty - A First Look at Signal Quality 70
2.5. Inductance in Action 81
2.6. Logic Circuit Models and Parasitic Components 83
2.7. Testing Combinational Circuits—Introduction and Philosophy 91
2.8. Modeling, Simulation, and Tools 92
2.9. Structural Faults 93
2.10. Functional Faults 99
2.11. Summary 100
2.12. Review Questions 101
2.13. Thought Questions 102
2.14. Problems 104
3. The Hardware Side—Part 3: Storage Elements and Finite-State Machines—A Practical View. 110
3.0. Introduction 110
3.1. The Concepts of State and Time 111
3.2. The State Diagram 112
3.3. Finite-State Machines—A Theoretical Model 113
3.4. Designing Finite–State Machines—Part 1: Registers 115
3.5. Designing Finite-State Machines: Part 2—Counting and Dividing 122
3.6. Practical Considerations—Part 1: Timing in Latches and Flip-Flops 129
3.7. Practical Considerations—Part 2: Clocks and Clock Distribution 132
3.8. Testing Sequential Circuits 138
3.9. Summary 148
3.10. Review Questions 148
3.11. Thought Questions 149
3.12. Problems 151
4. Memories and the Memory Subsystem. 160
4.0. Introduction 160
4.1. Classifying Memory 161
4.2. A General Memory Interface 162
4.3. ROM Overview 163
4.4. Static RAM Overview 164
4.5. Dynamic RAM Overview 166
4.6. Chip Organization 168
4.7. Terminology 168
4.8. A Memory Interface in Detail 170
4.9. A SRAM Design 170
4.10. A DRAM Design 173
4.11. The DRAM Memory Interface 175
4.12. The Memory Map 180
4.13. Memory Subsystem Architecture 181
4.14. Basic Concepts of Caching 182
4.15. Designing a Cache System 183
4.16. Caching—A Direct Mapped Implementation 184
4.17. Caching—An Associative Mapping Cache Implementation 187
4.18. Caching—A Block-Set Associative Mapping Cache Implementation 189
4.19. Dynamic Memory Allocation 190
4.20. Testing Memories 193
4.21. Summary 198
4.22. Review Questions 198
4.23. Thought Questions 200
4.24. Problems 201
5. An Introduction to Software Modeling. 204
5.0. Introduction 204
5.1. An Introduction to UML 205
5.2. UML Diagrams 206
5.3. Use Cases 207
5.4. Class Diagrams 208
5.5. Dynamic Modeling with UML 212
5.6. Interaction Diagrams 212
5.7. Sequence Diagrams 214
5.8. Fork and Join 215
5.9. Branch and Merge 216
5.10. Activity Diagram 217
5.11. State Chart Diagrams 217
5.12. Dynamic Modeling with Structured Design Methods 221
5.13. Summary 224
5.14. Review Questions 225
5.15. Thought Questions 226
5.16. Problems 227
6. The Software Side—Part 1: The C Program. 229
6.0. Introduction 229
6.1. Software and Its Manifestations 229
6.2. An Embedded C Program 234
6.3. C Building Blocks 236
6.4. C Program Structure 252
6.5. Summary 258
6.6. Review Questions 258
6.7. Thought Questions 259
6.8. Problems 260
7. The Software Side—Part 2: Pointers and Functions. 264
7.0. Introduction 264
7.1. Bitwise Operators 265
7.2. Pointer Variables and Memory Addresses 270
7.3. The Function 280
7.4. Pointers to Functions 290
7.5. Structures 294
7.6. The Interrupt 304
7.7. Summary 309
7.8. Review Questions 309
7.9. Thought Questions 310
7.10. Problems 312
Part Two Hardware and Software Infrastructure
8. Safety, Security, Reliability, and Robust Design. 314
8.0. Introduction 314
8.1. Safety 316
8.2. Reliability 317
8.3. Faults, Errors, and Failures 319
8.4. Another Look at Reliability 319
8.5. Some Real-World Examples 320
8.6. Single-Point and Common Mode Failure Model 322
8.7. Safe Specifications 323
8.8. Safe and Robust Designs 324
8.9. Safe and Robust Designs—The System 330
8.10. System Functional Level Considerations 330
8.11. System Architecture Level Considerations 332
8.12. Busses—The Subsystem Interconnect 335
8.13. Data and Control Faults—Data Boundary Values 337
8.14. Data and Control Faults—The Communications Subsystem 338
8.15. The Power Subsystem 349
8.16. Peripheral Devices—Built-In Self-Test (BIST) 352
8.17. Failure Modes and Effects Analysis 355
8.18. Security - Look Behind You 358
8.19. Understanding the Problem – Looking at the System 358
8.20. Analyzing the Problem – Looking at Potential Vulnerabilities 358
8.21. Understanding the Problem – Looking at the Attacks 360
8.22. Dealing With the Problem – Protecting Against the Attacks 364
8.23. Closure 378
8.24. Tomorrow 378
8.25. Summary 379
8.26. Review Questions 379
8.27. Thought Questions 380
8.28. Problems 381
9. Embedded Systems Design and Development. 382
9.0. Introduction 383
9.1. System Design and Development 384
9.2. Life-Cycle Models 386
9.3. Problem Solving—Six Steps to Design 391
9.4. Hardware-Software Co-Design 393
9.5. History 395
9.6. Co-Design Proces Overview 396
9.7. The Co-Design Process 397
9.8. Laying the Foundation 399
9.9. Identifying the Requirements 401
9.10. Formulating the Requirements Specification 403
9.11. The System Design Specification 414
9.12. System Specifications versus System Requirements 424
9.13. Executing the Hardware-Software Co-Design Process 425
9.14. Functional Decomposition 426
9.15. Partitioning and Mapping to an Architecture 430
9.16. Architectural Design 440
9.17. Functional Model versus Architectural Model 444
9.18. Modeling Tools and Languages for Co-Design 445
9.19. Co-Synthesis 456
9.20. Implementing the System 460
9.21. Co-Simulation 462
9.22. Co-Verification 469
9.23. Other Considerations 471
9.24. Archiving the Project 472
9.25. Summary 474
9.26. Review Questions474
9.27. Thought Questions 476
9.28. Problems 477
10. Hardware Test and Debug. 482
10.0. Introduction 482
10.1. Some Vocabulary 482
10.2. Putting Together a Strategy 483
10.3. Formulating a Plan 484
10.4. Formalizing the Plan—Writing a Specification 486
10.5. Executing the Plan—The Test Procedure and Test Cases 487
10.6. Applying the Strategy—Egoless Design 487
10.7. Applying the Strategy—Design Reviews 488
10.8. Applying the Strategy—Module Debug and Test 488
10.9. Applying the Strategy—The First Steps 490
10.10. Applying the Strategy—Debugging and Testing 493
10.11. Testing and Debugging Combinational Logic 496
10.12. Path Sensitizing 496
10.13. Masking and Untestable Faults 499
10.14. Single Variable–Multiple Paths 500
10.15. Bridge Faults 501
10.16. Debugging—Sequential Logic 502
10.17. Scan Design Testing 504
10.18. Boundary-Scan Testing 507
10.19. Memories and Memory Systems 508
10.20. Applying the Strategy—Subsystem and System Test 508
10.21. Applying the Strategy—Testing for Our Customer 509
10.22. Self-Test 510
10.23. Summary 511
10.24. Review Questions 511
10.25. Thought Questions 512
10.26. Problems 513
Part Three Doing the Work
11. Real-Time Kernels and Operating Systems. 514
11.0. Introduction 514
11.1. Tasks and Things 515
11.2. Programs and Processes 516
11.3. The CPU Is a Resource 517
11.4. Threads—Lightweight and Heavyweight 519
11.5. Sharing Resources 521
11.6. Foreground/Background Systems 523
11.7. The Operating System 524
11.8. The Real-Time Operating System (RTOS) 525
11.9. Operating System Architecture 525
11.10. Tasks and Task Control Blocks 526
11.11. Memory Management Revisited 536
11.12. Summary 541
11.13. Review Questions 541
11.14. Thought Questions 542
11.15. Problems 542
12. Tasks and Task Management. 544
12.0. Introduction 544
12.1. Time, Time-Based Systems, and Reactive Systems 545
12.2. Task Scheduling 547
12.3. Scheduling Algorithms 550
12.4. Real-Time Scheduling Considerations 556
12.5. Algorithm Evaluation 557
12.6. Tasks, Threads, and Communication 559
12.7. Task Cooperation, Synchronization, and Sharing 568
12.8. Talking and Sharing in Space 578
12.9. Monitors 582
12.10. Starvation 585
12.11. Deadlocks 585
12.12. Summary 586
12.13. Review Questions 586
12.14. Thought Questions 587
12.15. Problems 587
13. Deadlocks. 591
13.0. Introduction 591
13.1. Sharing Resources 591
13.2. System Model 592
13.3. Deadlock Model 593
13.4. A Graph Theoretic Tool—The Resource Allocation Graph 594
13.5. Handling Deadlocks 596
13.6. Deadlock Prevention 597
13.7. Deadlock Avoidance 598
13.8. Deadlock Detection 603
13.9. Summary 605
13.10. Review Questions 605
13.11. Thought Questions 605
13.12. Problems 606
14. Performance Analysis and Optimization. 608
14.0. Introduction 608
14.1. Getting Started 609
14.2. Performance or Efficiency Measures 609
14.3. Complexity Analysis—A High-Level Measure 612
14.4. The Methodology 613
14.5. Comparing Algorithms 615
14.6. Analyzing Code 617
14.7. Analyzing Algorithms 622
14.8. Analyzing Data Structures 624
14.9. Instructions in Detail 626
14.10. Time, Etc.—A More Detailed Look 634
14.11. Response Time 635
14.12. Time Loading 642
14.13. Memory Loading 645
14.14. Evaluating Performance 647
14.15. Thoughts on Performance Optimization 649
14.16. Performance Optimization 649
14.17. Tricks of the Trade 650
14.18. Hardware Accelerators 655
14.19. Introduction – Target Low Power 656
14.20. Low Power – A High Level View 656
14.21. Addressing Dynamic Power Consumption – Hardware 665
14.22. Addressing Dynamic Power Consumption – Software 669
14.23. Trade-offs 672
14.24. Summary 672
14.25. Review Questions 672
14.26. Thought Questions 673
14.27. Problems 674
Part Four Interacting with the Physical World
15. Working Outside of the Processor I: A Model of Interprocess Communication. 676
15.0. Communication and Synchronization with the Outside World 676
15.1. First Steps: Understanding the Problem 677
15.2. Interprocess Interaction Revisited 678
15.3. The Model 680
15.4. Exploring the Model 682
15.5. Summary 690
15.6. Review Questions 690
15.7. Thought Questions 690
16. Working Outside of the Processor I: Refining the Model of Interprocess Communication. 692
16.0. Communication and Synchronization with the Outside World 692
16.1. The Local Device Model 693
16.2. Implementing the Local Device Model—A First Step 696
16.3. Implementing the Local Device Model—A Second Step 703
16.4. Implementing an Event-Driven Exchange—Interrupts and Polling 705
16.5. A Message 713
16.6. The Remote Device Model 720
16.7. Implementing the Remote Device Model—A First Step 722
16.8. Implementing the Remote Device Model—A Second Step 728
16.9. Working with Remote Tasks 730
16.10. Group Multicast Revisited 738
16.11. Connecting to Distributed Processes—Pipes, Sockets, and Streams 738
16.12. Summary 741
16.13. Review Questions 741
16.14. Thought Questions 742
16.15. Problems 743
17. Working Outside of the Processor II: Interfacing to Local Devices. 744
17.0. Shared Variable I/O—Interfacing to Peripheral Devices 744
17.1. The Shared Variable Exchange 745
17.2. Generating Analog Signals 745
17.3. Common Measurements 750
17.4. Measuring Voltage 751
17.5. Measuring Resistance 759
17.6. Measuring Current 760
17.7. Measuring Temperature 761
17.8. Generating Digital Signals 765
17.9. Controlling DC and Servo Motors 767
17.10. LEDs and LED Displays 773
17.11. Measuring Digital Signals 776
17.12. Summary 782
17.13. Review Questions 783
17.14. Thought Questions 783
17.15. Problems 784
18. Working Outside of the Processor III: Interfacing to Remote Devices. 788
18.0. Common Network-Based I/O Architectures 788
18.1. Network-Based Systems 789
18.2. RS-232/EIA-232—Asynchronous Serial Communication 789
18.3. The Universal Serial Bus—Synchronous Serial Communication 796
18.4. I2C—A Local Area Network 805
18.5. The Controller Area Network—The CAN Bus 801
18.6. Summary 815
18.7. Review Questions 815
18.8. Thought Questions 816
18.9. Problems 816
19. Programmable Logic Devices. 818
19.0. Introduction 818
19.1. Why Use Programmable Logic Devices? 819
19.2. Basic Concepts 820
19.3. Basic Configurations 823
19.4. Programmable and Reprogrammable Technologies 825
19.5. Architectures 827
19.6. The Design Process 832
19.7. Design Examples 833
19.8. Summary 838
19.9. Review Questions 839
19.10. Thought Questions 839
20. Practical Considerations Signal Behavior in the Real World - Part 1 Noise and Crosstalk. 849
20.0. Introduction - The Real World Again 849
20.1. Noise. 849
20.2. Power Supply and Ground Noise 850
20.3. Crosstalk and Loops 860
20.4. Summary 864
20.5. Review Questions 865
20.6. Problems 865
21. Practical Considerations Signal Behavior in the Real World – Part 2-High Speed Signaling 865
21.0. Introduction – The Real World Yet Again 865
21.1. The Problem 866
21.2. The Working Environment 869
21.3. The Transmission Line 881
21.4. Differential Signaling 897
21.5. Signals in the Non-Ideal (Real) World 897
21.6. Other Considerations 899
21.7. Examining the Environment 899
21.8. Back of the Envelope Examination 902
21.9. Summary 905
21.10. Review Questions 905
21.11. Thought Questions 906
21.12. Problems 907
Appendix A. Verilog Overview: The Verilog Hardware Description Language. 908
A.0. Introduction 908
A.1. An Overview of a Verilog Program 909
A.2. Creating a Verilog Program 909
A.3. Three Models—The Gate Level, the Dataflow, and the Behavioral 915
A.4. Testing and Verifying the Circuit 935
A.5. Summary 939
James K. Peckol, Ph.D.
