Introduction to Multichip Modules
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  • Wiley

More About This Title Introduction to Multichip Modules

English

NAVEED SHERWANI graduated from the University of Nebraska at Lincoln in 1988, and then joined the Department of Computer Science at Western Michigan University. Naveed's research concentrates on combinatorics, graph algorithms, and algorithms for VLSI design automation. Dr. Sherwani has published over seventy-five refereed papers in various journals and conferences, and his paper on three-layer over-the-cell routing received the Distinguished Paper Award at ICCAD-91. He is also the author or coauthor of four books. In 1994, Dr. Sherwani joined Intel, where he currently leads the company's project on full chip layout. His work concentrates on over-the-cell routing for designing chips with very high-frequency goals.

QIONG YU received his MS degree in computer science from Western Michigan University in 1994. His research topics include MCM technology and routing algorithms, and he is the author of three published papers on these topics. During his graduate studies, he received an ACM/SIGDA scholarship, an excellence in research award, and placed on the graduate student honor roll. In 1994, Qiong Yu joined the technical staff of Cadence Design Systems. He is currently involved in the development of CAD tools for advanced packaging technologies for single chip as well as multichip modules.

SANDEEP BADIDA is a 1994 graduate of Western Michigan University, Kalamazoo, where he worked as a research assistant at the VLSI research lab. His work there focused on design and analysis of data structures and algorithms for graph theory and VLSI/MCM physical design automation. Mr. Badida has three publications to his credit in the area of high-performance routing for MCMs. For these papers, and in recognition of his outstanding research potential, he was honored with a 1994 Excellence in Research Award. Currently, Mr. Badida works for Advanced Micro Devices in the CAD Technology and Systems (CTS) group.

English

Evolution of Packaging Technology.

Classification of Multichip Modules.

Design of Multichip Module Based Systems.

Electrical Design MCMs.

Thermal Design of MCMs.

Testing and Assembly Yield Design.

Reliability Issues in MCMs.

Physical Design for MCMs.

CAD Tools for Multichip Modules.

Programmable Multichip Modules.

References.

Index.

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